In this paper a 24 GHz integrated front-end transceiver for vital signs detection (VSD) radars is described. The heterodyne radar transceiver integrates LO buffering and quadrature splitting circuits, up- and down-conversion SSB mixers and two cascaded receiver LNA's. The chip has been manufactured in a 0.25 µm SiGe:C BiCMOS technology and its size is 1390 × 2690 µm2. The transmitter demonstrates a maximum output power at 24 GHz of approximately −30 dBm with an externally applied LO power of 3 dBm. The receiver demonstrates a peak gain of 13.3 dB at 22.15 GHz with >10 dB return loss. The power consumption of the entire transceiver is approximately 164 mW.
2013 Sbmo/ieee Mtt-s International Microwave and Optoelectronics Conference (imoc), 2013
Fields, Waves and Electromagnetics; Photonics and Electrooptics; Gain; Integrated circuits; Mixers; Power generation; Radar; Reiceivers; Transceivers
Main Research Area:
International Microwave and Optoelectronics Conference, 2013