Custódio, J. R.3; Bastos, I.3; Oliveira, L. B.3; Oliveira, J. P.3; Pereira, P.4; Goes, J.3; Bruun, Erik1
1 Department of Electrical Engineering, Technical University of Denmark2 Electronics, Department of Electrical Engineering, Technical University of Denmark3 Universidade Nova de Lisboa4 Instituto Politécnico de Castelo Branco
This paper describes a fully-passive discrete-time switched-capacitor RF downconverter with an on-chip oscillator, that combines quadrature mixing and harmonic rejection, designed in a 130 nm digital CMOS technology. By using MOS capacitors (varactors) to perform parametric amplification, it is possible to achieve a measured gain enhancement of about 12 dB, together with 21 dB noise figure and more than 5 dBm IIP3. Operating in the VHF-III band, the downconverter core dissipates 6.2 mW and occupies 0.024 mm2.
Analog Integrated Circuits and Signal Processing, 2013, Vol 75, Issue 2, p. 299-304