1 Embedded Systems Engineering, Department of Informatics and Mathematical Modeling, Technical University of Denmark2 Department of Informatics and Mathematical Modeling, Technical University of Denmark3 Purdue University4 Department of Applied Mathematics and Computer Science, Technical University of Denmark
This paper evaluates the applicability of transactional mem- ory to the implementation of dierent non-blocking data structures in the context of the Real-time Specication for Java. In particular, we argue that hardware support for micro-transaction allows us to implement eciently data structures that are often dicult to realize with the atomic operations provided by stock hardware. Our main imple- mentation platform is the Java Optimized Processor sys- tem. We report on the performance of data structures imple- mented with locks, compare and swap and micro-transactions. Our results conrm that transactional memory is an inter- esting alternative to traditional concurrency control mecha- nisms.
Proceedings of the 9th International Workshop on Java Technologies for Real-time and Embedded Systems (jtres 2011), 2011
Wait-Free queue; MCAS; CAS; Transactional Memory
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9th International Workshop on Java Technologies for Real-Time and Embedded Systems, 2011