FPGA Implementation of Decimal Processors for Hardware Acceleration

Nicolas Borup; Jonas Dindorp; Alberto Nannarelli

doi:10.1109/NORCHP.2011.6126729

FPGA Implementation of Decimal Processors for Hardware Acceleration

Authors:

Borup, Nicolas ;
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Technical University of Denmark
Dindorp, Jonas ;
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Technical University of Denmark
Nannarelli, Alberto
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Department of Informatics and Mathematical Modeling, Technical University of Denmark

DOI:

10.1109/NORCHP.2011.6126729

Abstract:

Applications in non-conventional number systems can benefit from accelerators implemented on reconfigurable platforms, such as Field Programmable Gate-Arrays (FPGAs). In this paper, we show that applications requiring decimal operations, such as the ones necessary in accounting or financial transactions, can be accelerated by Application Specific Processors (ASPs) implemented on FPGAs. For the case of a telephone billing application, we demonstrate that by accelerating the program execution on a FPGA board connected to the computer by a standard bus, we obtain a significant speed-up over its execution on the CPU of the hosting computer.

ISBN:

9781457705144, 9781457705151

Type:

Conference paper

Language:

English

Published in:

Proceedings of Norchip 2011, 2011

Keywords:

Main Research Area:

Science/technology

Publication Status:

Published

Review type:

Peer Review

Conference:

29th NORCHIP Conference, 2011

Publisher:

IEEE

Submission year:

2011

Scientific Level:

Scientific

ID:

233920394

FPGA Implementation of Decimal Processors for Hardware Acceleration

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