Hardware-Software co-design is a powerful method nowadays for the embedded system development. Reducing time to the market, more accuracy and interactivity with the whole system by the co-design developments are available. The paper considers and investigates a co-design solution applied to a real-time kernel (RTK) named HARTEX. The objective was to even more improve the timing performances of the kernel in terms of minimized, constant overhead (jitter free), in an application transparent manner. The co-design solution partitions the kernel between a pure software part, with constant overhead, and a FPGA part, with null overhead, due to the execution speed in the micros domain. As a consequence, the HARTEX co-design solution is considered as a truly jitter-free kernel, invariant to the number of tasks. The HARTEX co-design solution has been tested and guaranteed under the platform of microcontroller AVR ATmega128 and Xilinx FPGA Spartan-II kit.