1 Department of Computer Science, Faculty of Science, Aarhus University, Aarhus University2 unknown3 Redaktør
Radar Memory Interface Card Case Study Revisited
The work focuses on the analysis of an example of synchronous systems containing FIFO buffers, registers and memory interconnected by several private and shared busses. The example used in this work is based on a Terma radar system memory interface case study from the IST AMETIST project.
16th Nordic Workshop of Programming Theory, 2004, p. 94-95