In this paper, a new technique is proposed to improve the device characteristics by introducing asymmetric doping at the source and the drain of the conventional FinFET. Specifically, the proposed device exhibits 9X increase of the Ion/Ioff ratio and 3X improved DIBL compared to conventional symmetric FinFET devices. We note a reduction in sub-threshold swing (SS) of 16% with 7% Ion degradation. The proposed FinFETs can be utilized in SRAM cells and logic circuits to improve their functionality at ultra-scaled technologies.
8th European Workshop on Silicon on Insulator Technology, Devices and Circuits: Eurosoi 2012, 2012, p. 91-92
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Eighth Workshop of the Thematic Network on Silicon on Insulator technology, devices and circuits, 2012