1 Department of Engineering - Integrated Electronics, Department of Engineering, Science and Technology, Aarhus University 2 University of Electronic Science and Technology of China 3 Integrated Device Technology, Shanghai 4 Department of Engineering - Integrated Electronics, Department of Engineering, Science and Technology, Aarhus University
This paper presents an implementation of multi-rate SerDes transceiver for IEEE 1394b applications. Simple and effective pre-emphasis and equalizer circuits are used at transmitter and receiver, respectively. A phase interpolator based clock and data recovery circuit with optimized linearity is also described. With an on-chip fully integrated phase locked loop, the transceiver works at data rates of 100Mb/s, 400Mb/s and 800Mb/s, supporting three different operating modes of S100b, S400b and S800b for IEEE 1394b. The chip has been fabricated using 0.13μm technology. The die area of transceiver is 2.9*1.6 mm including bonding pads and the total power dissipation is 284 mW with 1.2V and 3.3V supply voltages. © 2012 IEEE.
Journal of Electronic Science and Technology, 2012, Vol 10, Issue 4, p. 319-326
Main Research Area: