This thesis investigates the design of high eciency Power Factor Correction (PFC) converter for Class-D amplier at universal line and 3.5kW power range. The work starts with an overview on dierent high eciency Bridgeless PFC topologies and investigates their applicability with respect to the given speci- cations in Chapter 1. Based on the conclusions of Chapter 2, the single-phase Two-Boost-Circuit Bridgeless PFC converter topology is considered the most promising to start with regarding the achievable converter eciency and the EMI performances.The subsequent Chapters discuss the method to optimize and improve the performance of Two-Boost-Circuit BPFC converter in detail. Chapter 3 explains the working principle of the Two-Boost-Circuit BPFC converter rstly. And then, an optimized design procedure is implemented to achieve an useful compromise between eciency and power density. Where, impacts of the Boost inductor design is analyzed carefully.Chapter 4 rstly presents a novel interleaved BPFC (IBPFC) topology, which can be consider as the extension version of traditional Two-Boost-Circuit BPFC in Chapter 3 for EMI improvement. And then, the IBPFC's EMI model is used to study the insight of the relationship of EMI reduction and the number of interleaved stages. Moreover, an multi-objective optimization design procedure is proposed for designing a high eciency, high power density and low EMI IBPFC system. Finally, frequency dithering technique is researched and implemented for the proposed IBPFC to gain further EMI attenuation. Chapter 5 analyzes the measurement accuracy of the eciency results presented in this thesis in Chapter 4, which makes the eciency measurement in this report more convictive.Chapter 6 summarizes the obtained results and concludes this work. Furthermore, an outlook regarding future researches in the IBPFC converter is presented.
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Hansen, Lars B. R., Thomsen, Ole Cornelius, Andersen, Michael A. E.